Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
SiRF |
Type: |
atlasV |
Year Released: |
2010 |
Function |
Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
32 bit |
Supported Instruction Set(s): |
ARMv6 |
Pipeline Stages![Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions.](icons/10x10/info_gray.gif) |
8 pipeline stages |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
ARM1136JF-S |
Number of processor core(s): |
single-core |
Buses:
|
Memory Interface(s): |
DDR SDRAM
, LPDDR SDRAM
, DDR2 SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
400 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
64 bit |
Number of data bus channels: |
1 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
6.4 Gbyte/s |
Non-volatile Memory Data Bus Width![Maximum selectable bit width of secondary data (non-volatile storage) bus of memory interface Maximum selectable bit width of secondary data (non-volatile storage) bus of memory interface](icons/10x10/info_gray.gif) |
8 bit |
Non-volatile Memory Interface |
NAND Flash Interface |
Clock Frequencies:
|
Recommended Minimum Clock Frequency: |
664 MHz min. |
Recommended Maximum Clock Frequency: |
500 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core![Capacity of level 1 instruction cache per processor core Capacity of level 1 instruction cache per processor core](icons/10x10/info_gray.gif) |
16 Kbyte I-Cache |
L1 Data Cache per Core![Capacity of level 1 data cache per processor core Capacity of level 1 data cache per processor core](icons/10x10/info_gray.gif) |
16 Kbyte D-Cache |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
65 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Pins![Number of pins on the package Number of pins on the package](icons/10x10/info_gray.gif) |
285 pins |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
N/A |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: VFPU, MMU, integrated 64-channel SiRF GPS / Galileo engine, USB 2.0 OTG, SiRFAlwaysFix and SiRFHibernation technology technology, I2S, I2C, AC 97 audio, 4 x SD/MMC+/SDIO, 2 UARTs , 2 x I2C, 12-bit ADC |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2010-06-29 16:41 |