Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
NVIDIA |
Type: |
Tegra 3 T33 |
Codename: |
Kal-El |
Year Released: |
2012 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
32 bit |
Supported Instruction Set(s): |
ARMv7-A |
Pipeline Stages![Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions.](icons/10x10/info_gray.gif) |
8 pipeline stages |
Number of processor core(s): |
5 |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
5x ARM Cortex-A9 MPCore |
Buses:
|
Memory Interface(s): |
mobile (LP) DDR2 SDRAM
, DDR3L (LV) SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
800 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
32 bit |
Number of data bus channels: |
1 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
6.4 Gbyte/s |
Non-volatile Memory Interface |
NAND Flash Interface |
Clock Frequencies:
|
Recommended Minimum Clock Frequency: |
1600 MHz min. |
Recommended Maximum Clock Frequency: |
1700 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core![Capacity of level 1 instruction cache per processor core Capacity of level 1 instruction cache per processor core](icons/10x10/info_gray.gif) |
32 Kbyte I-Cache |
L1 Data Cache per Core![Capacity of level 1 data cache per processor core Capacity of level 1 data cache per processor core](icons/10x10/info_gray.gif) |
32 Kbyte D-Cache |
Total L2 Cache![Capacity of level 2 cache shared between processor core(s) Capacity of level 2 cache shared between processor core(s)](icons/10x10/info_gray.gif) |
1024 Kbyte L2 |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
40 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
TSMC |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
NVIDIA GeForce ULP MP12 GPU |
Number of GPU cores: |
12-core GPU |
GPU Clock: |
520 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Communication Interfaces:
|
Supported USB Specification: |
No |
Bluetooth support |
No |
Wireless LAN support |
No |
Supported Audio/Video Interface: |
No |
Satellite Navigation:
|
Supported GPS protocol(s): |
No |
Additional Information:
|
Special Features: 4x Cortex-A9 Harvard Superscalar primary core, 1x 500MHz Cortex-A9 Harvard Superscalar companion core, 32KB I-cache + 32KB D-cache per core, 1MB L2 cache in total, 32-bit LP-DDR2-1066 and DDR3-L-1600 SD RAM interface, ARM NEON instruction set, Enhanced NAND Flash support, High Definition Audio Video Processor, integrated 520 MHz 12-core NVIDIA GeForce ULP GPU, NTSC/PAL TV output, HDMI 1.4a, OpenGL ES, OpenVG 1.1, EGL 1.4, 3D Stereo Sound, 32MP camera support, 5MP secondary camera support |
Datasheet Attributes:
|
Data Integrity |
Final |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2012-02-27 20:51 |