Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
UNISOC |
Type: |
Tiger T616 UMS9230T |
Year Released: |
2021 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
64 bit |
Supported Instruction Set(s): |
ARMv8.2-A |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
2x ARM Cortex-A75 + 6x ARM Cortex-A55 MPcore |
Number of processor core(s): |
octa-core |
Buses:
|
Memory Interface(s): |
LPDDR4 SDRAM
, LPDDR4x SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
1866 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
16 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
14.93 Gbyte/s |
Non-volatile Memory Interface |
eMMC 5.1
, UFS 2.0
, UFS 2.1
, UFS 2.2![Released in Aug, 2020, UFS 2.2 defines single-lane 600 MB/s or dual-lane 1.2 GB/s NAND flash EEPROM interface. Introduces a feature called WriteBooster Released in Aug, 2020, UFS 2.2 defines single-lane 600 MB/s or dual-lane 1.2 GB/s NAND flash EEPROM interface. Introduces a feature called WriteBooster](icons/10x10/info_gray.gif) |
Clock Frequencies:
|
Recommended Maximum Clock Frequency: |
2000 MHz max. |
Cache Memories:
|
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
12 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
TSMC |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
ARM Mali-G57 GPU |
Number of GPU cores: |
1-core GPU |
GPU Clock: |
750 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
CSD
, GPRS
, GPRS C10
, EDGE
, EDGE MSC10
, UMTS
, HSUPA
, HSUPA 1.4
, HSUPA 2.0
, HSUPA 5.8
, HSUPA 11.5
, HSDPA
, HSDPA 1.8
, HSDPA 3.6
, HSDPA 7.2
, HSDPA 10.2
, HSDPA 14.4
, HSPA+ 21.1
, HSPA+ 28.8
, HSPA+ 42.2
, DC-HSDPA 42.2
, TD-SCDMA
, TD-HSDPA
, LTE
, LTE 100/50
, LTE 150/50
, LTE 300/50
, LTE 300/75
, LTE 300/100 data links |
Additional Information:
|
Special Features: 2x ARM Cortex-A75 (up to 2 GHz) + 6x ARM Cortex-A55 (up to 1.8 GHz) Harvard Superscalar processor core, HMP, dual-SIM / dual standby support, 1080p 60 fps video encode/decode, 60 Hz FHD+ / 90 Hz HD+ display support, tri-core.. ›› |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2022-10-08 21:36 |