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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Intel
Type Core 7th Gen i7-7660U
Codename Kaby Lake
Year Released 2017
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit
Supported Instruction Set(s) IA-64 (x86-64), MMX, SSE, SSE2, SSE3, SSE4, SSE 4.1, SSE 4.2, AV
Number of processor core(s) 2
Type of processor core(s)Type and allocation of processor core(s) 2x Intel Kaby Lake-U

BusesBuses: 
Memory Interface(s):   DDR3L (LV) SDRAM , mobile (LP) DDR3 SDRAM , DDR4 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 1066 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 34.11 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate , SATA IISerial AT Attachment revision 2.0 (released in 2004) or 2.x offering 3 Gbit/s data rate , SATA IIISerial ATA revision 3.0 (released in 2004) or 3.x with 6 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Internal Systembus Clock 400 MHz
Recommended Minimum Clock Frequency 2500 MHz min.
Recommended Maximum Clock Frequency 4000 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
Number of L1 Cache Ways:  8-way
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 512 Kbyte L2
Number of L2 Cache Ways:  4-way
Total L3 Cache 4096 Kbyte L3

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 14 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component Intel
PinsNumber of pins on the package 1356 pins

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). Intel Iris Graphics 640 GPU
Number of GPU cores 48-core GPU
GPU Clock 300 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   No
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  No
Supported Audio/Video Interface:   No

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   Yes

Additional InformationAdditional Information: 
Special Features
Dual Intel Kaby Lake-U processor cores, 32 Kbyte instruction cache per core, 32 Kbyte data cache per core, 256 Kbyte L2 cache per core, 4 Mbyte L3 cache (Intel Smart Cache, 16-way set associative), dual-channel 64-bit DDR4-2133, LPDDR3-1866, DDR3L-1600 SD RAM interface (max. 34.1 GB/s), Intel Hyper-Threading Technology, Intel Virtualization Technology, Intel Turbo Boost 2.0 Technology, 300 MHz Intel iris Plus Graphics 620 EU48 GPU (max. 1.1 GHz), 64 Mbyte eDRAM (VRAM), DirectX 12. OpenGL 4.4, Intel Clear Video HD Technology, Intel vPro, Intel HD Audio Technology, Intel TSX-NI, Intel Wireless Display, Intel Insider, Intel InTru 3D Technology, Intel Quick Sync Video, Image Signal Processor, 4K eDP/DP/HDMI output support, USB 3.0 support

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2017-11-04 14:38
 
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