Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
Intel |
Type: |
Core 7th Gen i7-7660U |
Codename: |
Kaby Lake |
Year Released: |
2017 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
64 bit |
Supported Instruction Set(s): |
IA-64 (x86-64), MMX, SSE, SSE2, SSE3, SSE4, SSE 4.1, SSE 4.2, AV |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
2x Intel Kaby Lake-U |
Number of processor core(s): |
dual-core |
Buses:
|
Memory Interface(s): |
DDR3L SDRAM
, LPDDR3 SDRAM
, DDR4 SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
1066 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
64 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
34.11 Gbyte/s |
Non-volatile Memory Interface |
SATA
, SATA II
, SATA III![Serial ATA revision 3.0 (released in 2004) or 3.x with 6 Gbit/s data rate Serial ATA revision 3.0 (released in 2004) or 3.x with 6 Gbit/s data rate](icons/10x10/info_gray.gif) |
Clock Frequencies:
|
Internal Systembus Clock: |
400 MHz |
Recommended Minimum Clock Frequency: |
2500 MHz min. |
Recommended Maximum Clock Frequency: |
4000 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core![Capacity of level 1 instruction cache per processor core Capacity of level 1 instruction cache per processor core](icons/10x10/info_gray.gif) |
32 Kbyte I-Cache |
L1 Data Cache per Core![Capacity of level 1 data cache per processor core Capacity of level 1 data cache per processor core](icons/10x10/info_gray.gif) |
32 Kbyte D-Cache |
Total L2 Cache![Capacity of level 2 cache shared between processor core(s) Capacity of level 2 cache shared between processor core(s)](icons/10x10/info_gray.gif) |
512 Kbyte L2 |
Total L3 Cache: |
4096 Kbyte L3 |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
14 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
Intel |
Pins![Number of pins on the package Number of pins on the package](icons/10x10/info_gray.gif) |
1356 pins |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
Intel Iris Graphics 640 GPU |
Number of GPU cores: |
48-core GPU |
GPU Clock: |
300 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: Dual Intel Kaby Lake-U processor cores, 32 Kbyte instruction cache per core, 32 Kbyte data cache per core, 256 Kbyte L2 cache per core, 4 Mbyte L3 cache (Intel Smart Cache, 16-way set associative), dual-channel 64-bit DDR4-2133, LPDDR3-1866, DDR3L-1600 SD.. ›› |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2017-11-04 14:38 |