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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Apple
Type A8X APL1012
Codename T7001
Year Released 2014
FunctionMain function of the component  SoC

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit
Supported Instruction Set(s) ARMv8-A (A32, A64)
Type of processor core(s)Type and allocation of processor core(s) 3x Apple Typhoon cores
Number of processor core(s) tri-core

BusesBuses: 
Memory Interface(s):   LPDDR3 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 800 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 25.6 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  eMMC 5.1Complies with embedded MMC 5.1 specification released in 2015 , moviNANDmoviNAND is a multimedia card (MMC) controller and onboard firmware developed by Samsung in 2006 , NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 1500 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 64 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 64 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 2048 Kbyte L2
Total L3 Cache 4096 Kbyte L3

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 20 nm
Semiconductor Technology:   FinFETMultigate (usually double-gate) MOSFET transistor technology
Number of Transistors Integrated 3000000000
FabPlant which fabricates the semiconductor component TSMC

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). IMG PowerVR GX6850 GPU
Number of GPU cores 8-core GPU
GPU Clock 450 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Additional InformationAdditional Information: 
Special Features
3x Custom Apple Typhoon 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores, 512 Kbyte L2 cache per core, 4 Mbyte L3 cache, ARM VFPv4, dembedded 2 Gbyte LP-DDR3 SD RAM, 2160p video encode, 2160p video decode, PowerVR Series 6XT GXA6850.. ››

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2014-10-14 12:56
 
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