Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
Samsung |
Type: |
Exynos 5 Octa 5430 |
Year Released: |
2014 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
32 bit |
Supported Instruction Set(s): |
ARMv7 |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
4x ARM Cortex-A15 MPcore + 4x ARM Cortex-A7 MPcore |
Number of processor core(s): |
octa-core |
Buses:
|
Memory Interface(s): |
DDR2 SDRAM
, LPDDR2 SDRAM
, DDR3L SDRAM
, LPDDR3 SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
1066 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
32 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
17.06 Gbyte/s |
Non-volatile Memory Interface |
eMMC 4.5
, eMMC 5.0
, moviNAND
, NAND Flash Interface
, SATA![SATA revision 1.0 (2003) offering 1.5 Gbit/s data rate SATA revision 1.0 (2003) offering 1.5 Gbit/s data rate](icons/10x10/info_gray.gif) |
Clock Frequencies:
|
Recommended Maximum Clock Frequency: |
1800 MHz max. |
Cache Memories:
|
Total L2 Cache![Capacity of level 2 cache shared between processor core(s) Capacity of level 2 cache shared between processor core(s)](icons/10x10/info_gray.gif) |
2048 Kbyte L2 |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
20 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
Samsung |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
ARM Mali-T628 GPU |
GPU Clock: |
600 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: Quad 1.8 GHz (max) ARM Cortex-A15 Harvard Superscalar processor cores (2 Mbyte L2 cache) + Quad 1.3 GHz (max) ARM Cortex-A7 Harvard Superscalar processor cores (512 Kbyte L2 cache), ARM big.LITTLE architecture, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON.. ›› |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2014-08-14 13:15 |