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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Ingenic
Type Jz4720
Year Released 2008
FunctionMain function of the component  Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) MIPS32
Number of processor core(s) 1
Type of processor core(s)Type and allocation of processor core(s) MIPS XBurst

BusesBuses: 
Memory Interface(s):   SDRAM
Number of data bus channels 1 ch
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  NAND Flash Interface


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 240 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 16 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 16 Kbyte D-Cache

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 180 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). N/A

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   No
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  No
Supported Audio/Video Interface:   No

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   No

Additional InformationAdditional Information: 
Special Features
AHB bus, 6 ch. DMC, Multimedia accelerator, LCD Controller, MMC/SD/SDIO controller

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2009-05-14 15:26
 
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