Generel Characteristics: |
Designer |
Apple |
Type: |
A5R3 APL7498 |
Codename: |
S5L8947 |
Year Released: |
2013 |
Function |
Application Processor |
Architecture: |
Width of Machine Word |
32 bit |
Supported Instruction Set(s): |
ARMv7 |
Pipeline Stages |
8 pipeline stages |
Type of processor core(s) |
ARM Cortex-A9 |
Number of processor core(s): |
single-core |
Buses: |
Memory Interface(s): |
LPDDR2 SDRAM |
Max. Clock Frequency of Memory IF |
400 MHz |
Data Bus Width |
32 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate |
6.4 Gbyte/s |
Non-volatile Memory Interface |
moviNAND
, NAND Flash Interface
, SATA |
Clock Frequencies: |
Recommended Minimum Clock Frequency: |
800 MHz min. |
Recommended Maximum Clock Frequency: |
1000 MHz max. |
Cache Memories: |
L1 Instruction Cache per Core |
32 Kbyte I-Cache |
L1 Data Cache per Core |
32 Kbyte D-Cache |
Total L2 Cache |
512 Kbyte L2 |
Technology and Packaging: |
Feature Size |
32 nm |
Semiconductor Technology: |
CMOS |
Fab |
Samsung |
Graphical Subsystem: |
Embedded GPU |
IMG PowerVR SGX543 GPU |
Number of GPU cores: |
2-core GPU |
GPU Clock: |
200 MHz GPU |
Cellular Communication: |
Supported Cellular Data Links |
No |
Additional Information: |
Special Features: single ARM Cortex-A9 Harvard Superscalar processor core, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, triple display controller, 1080p video encode, 1080p video decode, audio subsystem, OpenGL ES 2.0 |
Datasheet Attributes: |
Data Integrity |
Final |
Added |
2024-07-12 11:07 |