Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
Qualcomm |
Type: |
Snapdragon 800 MSM8974AB v2 |
Year Released: |
2013 |
Function |
Multi-core Application Processor with Modem |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
32 bit |
Supported Instruction Set(s): |
ARMv7 |
Pipeline Stages![Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions.](icons/10x10/info_gray.gif) |
11 pipeline stages |
Number of processor core(s): |
4 |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
4x Qualcomm Krait 400 |
Buses:
|
Memory Interface(s): |
mobile (LP) DDR3 SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
933 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
32 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
14.93 Gbyte/s |
Non-volatile Memory Interface |
eMMC 5.0
, SATA
, SATA II![Serial AT Attachment revision 2.0 (released in 2004) or 2.x offering 3 Gbit/s data rate Serial AT Attachment revision 2.0 (released in 2004) or 2.x offering 3 Gbit/s data rate](icons/10x10/info_gray.gif) |
Clock Frequencies:
|
Recommended Maximum Clock Frequency: |
2265 MHz max. |
Cache Memories:
|
L0 Instruction Cache per Core![Capacity of level 0 instruction cache per processor core Capacity of level 0 instruction cache per processor core](icons/10x10/info_gray.gif) |
4 Kbyte L0 I-Cache |
L1 Instruction Cache per Core![Capacity of level 1 instruction cache per processor core Capacity of level 1 instruction cache per processor core](icons/10x10/info_gray.gif) |
16 Kbyte I-Cache |
L1 Data Cache per Core![Capacity of level 1 data cache per processor core Capacity of level 1 data cache per processor core](icons/10x10/info_gray.gif) |
16 Kbyte D-Cache |
Total L2 Cache![Capacity of level 2 cache shared between processor core(s) Capacity of level 2 cache shared between processor core(s)](icons/10x10/info_gray.gif) |
2048 Kbyte L2 |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
28 nm |
Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
TSMC |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
Qualcomm Adreno 330 GPU |
GPU Clock: |
550 MHz GPU |
Dedicated Graphics Memory![Dedicated operative memory (video RAM, VRAM) Dedicated operative memory (video RAM, VRAM)](icons/10x10/info_gray.gif) |
1 MiB |
Cellular Communication:
|
Supported Cellular Data Links |
CSD 9.6 kbps
, GPRS (Class unspecified)
, EDGE (Class unspecified)
, UMTS 384 kbps (W-CDMA)
, HSDPA (Cat. unspecified)
, HSPA+ 42.2 Mbps (Cat. 20)
, CDMA2000 1xRTT (IS-2000)
, CDMA2000 1xEV-DO Rel. 0
, CDMA2000 1xEV-DO Revision A
, CDMA2000 1xEV-DO Revision B
, TD-SCDMA
, LTE (Cat. unspecified)
, LTE 150 Mbps / 50 Mbps (Cat. 4) data links |
Communication Interfaces:
|
Supported USB Specification: |
No |
Bluetooth support |
No |
Wireless LAN support |
No |
Supported Audio/Video Interface: |
No |
Satellite Navigation:
|
Supported GPS protocol(s): |
Yes |
Supported GLONASS protocol(s) |
Yes |
Additional Information:
|
Special Features: 4x Qualcomm Krait 400 Harvard Superscalar processor core, 600 MHz Hexagon QDSP6V5A (GSM, GPRS, EDGE, UMTS/WCDMA HSPA+ 42Mbps, DC-HSPA+, MBMS, LTE Cat. 4, CDMA2000 1xRTT, CDMA2000 1xEV-DO, CDMA2000 1xEV-DO Rev. A, CDMA2000 1xEV-DO Rev. B, CDMA2000 1xEV-DO MC Rev. A, TD-SCDMA baseband), OpenGL ES 3.0, OpenCL 1.1, OpenVG 1.1, EGL 3.1, DirectX 11, 465 MHz ISP, 55 MP camera support, Stereoscopic 3D Kit, 2160p video encode/decode, gpsOneGen 8B with GLONASS, USB 3.0. Snapdragon 800 Processors are designed to deliver blazing fast apps and web browsing, visually stunning graphics, breakthrough multimedia capabilities, seamless communications virtually anytime, anywhere, and outstanding battery life for premium smartphones, Smart TVs, digital media adapters and tablets. |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2013-09-06 16:45 |