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Designer |
ST-Ericsson |
| Type: | Nova A9500 |
| Year Released: | 2010 |
| Function |
Multi-core Application Processor |
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| Width of Machine Word |
32 bit |
| Supported Instruction Set(s): | ARMv7 |
| Pipeline Stages |
8 pipeline stages |
| Type of processor core(s) |
2x ARM Cortex-A9 MPcore |
| Number of processor core(s): | dual-core |
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| Memory Interface(s): | LPDDR2 SDRAM |
| Number of data bus channels: | 1 ch |
| Non-volatile Memory Interface |
Yes |
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| Recommended Minimum Clock Frequency: | 1000 MHz min. |
| Recommended Maximum Clock Frequency: | 1200 MHz max. |
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| Feature Size |
45 nm |
| Semiconductor Technology: |
CMOS |
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| Embedded GPU |
ARM Mali-400 GPU |
| Number of GPU cores: | 1-core GPU |
| Dedicated Graphics Memory |
0.25 MiB |
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| Supported Cellular Data Links |
No |
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| Special Features: dual ARM Cortex-A9 Harvard Superscalar processor core, Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, 1080p HDMI, WXGA LCD support, OpenGL ES 2.0, OpenVG 1.1 |
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| Data Integrity |
Preliminary |
| Added |
2011-12-31 11:51 |
| Tweet | |
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