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|
| Designer |
Apple |
| Type: | A5X APL5498 S5L8945X |
| Year Released: | 2012 |
| Function |
SoC |
|
|
| Width of Machine Word |
32 bit |
| Supported Instruction Set(s): | ARMv7 |
| Pipeline Stages |
8 pipeline stages |
| Type of processor core(s) |
2x ARM Cortex-A9 MPcore |
| Number of processor core(s): | dual-core |
|
|
| Memory Interface(s): | LPDDR2 SDRAM |
| Max. Clock Frequency of Memory IF |
400 MHz |
| Data Bus Width |
32 bit |
| Number of data bus channels: | 4 ch |
| Max. Data Rate |
12.8 Gbyte/s |
| Non-volatile Memory Interface |
moviNAND |
|
|
| Recommended Maximum Clock Frequency: | 1000 MHz max. |
|
|
| L1 Instruction Cache per Core |
32 Kbyte I-Cache |
| L1 Data Cache per Core |
32 Kbyte D-Cache |
| Total L2 Cache |
1024 Kbyte L2 |
|
|
| Feature Size |
45 nm |
| Semiconductor Technology: |
CMOS |
| Fab |
Samsung |
|
|
| Embedded GPU |
IMG PowerVR SGX543 GPU |
| Number of GPU cores: | 4-core GPU |
| GPU Clock: | 250 MHz GPU |
|
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| Supported Cellular Data Links |
No |
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| Special Features: dual ARM Cortex-A9 Harvard Superscalar processor core, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, triple display controller, 1080p video encode, 1080p video decode, audio subsystem |
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|
| Data Integrity |
Preliminary |
| Added |
2012-03-07 21:50 |
| Tweet | |