PhoneDB - infinitely detailed




FacebookGoogle PlusRSS FeedTwitter
Device SpecsDevice Specs5 
Search 
Compare 
List all 
FirmwareFirmware 
Search 
List all 
Processor SpecsProcessor Specs 
Search 
Compare 
List all 
OS SpecsOS Specs 
Search 
Compare 
List all 
Mobile OperatorsMobile Operators 
Search 
Compare 
List all 

Processor Specs: Detailed Parametric Search Tool

Parametric search tool looks for datasheets that exactly match your search criteria. Untouched fields will not affect the query. If you finished entering parameters click on the "Start Search" button to start the query. Then the form moves to left (the search criteria may be refined by you any time) and results are located on the right. You can also easily compare selected results after the query by using "Add to compare" buttons. If you are not familiar with advanced parametric search tools please review our quick search tips first.
You are using the detailed version of parametric search tool. To simplify the form and hide some special parameters switch to standard search tool. Please note that returning to standard version by using arrows at the right top corners of any section may affect results if criteria that are only present in detailed version were entered by you. Switch to: Standard search tool
Jump to sectionJump to section Clock Frequencies | Cache Memories | Technology and Packaging | Graphical Subsystem | Cellular Communication | Satellite Navigation

Generel Characteristics
Generel Characteristics
Company which designed the semiconductor component Designer
Type
Codename
Year Released
min: max:  
Main function of the component Function:
Architecture
Architecture
Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Width of Machine Word
min: max:  bit
Supported Instruction Set(s)
Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. Pipeline Stages
min: max:  pipeline stages
Number of processor core(s)
min: max:  
Type and allocation of processor core(s) Type of processor core(s)
Buses
Buses
. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Memory Interface(s):
Maximum selectable bit width of address bus of memory interface Address Bus Width
min: max:  bit
Clock frequency of fastest supported memory interface Max. Clock Frequency of Memory IF
min: max:  MHz
Maximum selectable bit width of primary data bus (RAM) of memory interface Data Bus Width
min: max:  bit
Number of data bus channels
min: max:  ch
Possible values: 1, 2 Data Transfers per Clock Cycle
min: max:  
Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Max. Data Rate
min: max:  Gbyte/s
Maximum selectable bit width of secondary data (non-volatile storage) bus of memory interface Non-volatile Memory Data Bus Width
min: max:  bit
Interface which determines physical layer towards the NV memory. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Non-volatile Memory Interface:
DMA (Direct Memory Access) allows direct data transfer between operative memory (RAM) and peripherals (hard disk, non-volatile storage, etc.) bypassing processor core. Multiple DMA channels allows parallel DMA operations. DMA Channels
min: max:  ch
Clock Frequencies
Clock Frequencies
Recommended Minimum Clock Frequency
min: max:  MHz min.
Recommended Maximum Clock Frequency
min: max:  MHz max.
Cache Memories
Cache Memories
Capacity of level 0 instruction cache per processor core L0 Instruction Cache per Core
min: max:  Kbyte L0 I-Cache
Capacity of level 0 data cache per processor core L0 Data Cache per Core
min: max:  Kbyte L0 D-Cache
Capacity of level 1 instruction cache per processor core L1 Instruction Cache per Core
min: max:  Kbyte I-Cache
Capacity of level 1 data cache per processor core L1 Data Cache per Core
min: max:  Kbyte D-Cache
Capacity of level 2 cache shared between processor core(s) Total L2 Cache
min: max:  Kbyte L2
Total L3 Cache
min: max:  Kbyte L3
Technology and Packaging
Technology and Packaging
The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology Feature Size
min: max:  nm
Semiconductor Technology:
Number of Transistors Integrated
min: max:  
Plant which fabricates the semiconductor component Fab
Number of pins on the package Pins
min: max:  pins
Supply Voltage
min: max:  V
Graphical Subsystem
Graphical Subsystem
Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Embedded GPU
Number of GPU cores
min: max:  -core GPU
GPU Clock
min: max:  MHz GPU
Dedicated operative memory (video RAM, VRAM) Dedicated Graphics Memory
min: max:  MiB
Cellular Communication
Cellular Communication
List of supported cellular data links. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Supported Cellular Data Links:
Satellite Navigation
Satellite Navigation
. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Supported GPS protocol(s):
Galileo is a global satellite navigation system operated by European Union and the European Space Agency.. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Supported Galileo service(s):
GLONASS is a global satellite navigation system operated by Russia.. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Supported GLONASS protocol(s):
BeiDou System (BDS) is a Chinese satellite navigation system. Its global variant is the BeiDou-2 alias COMPASS.. If you select more than one specific options results having ALL of the selected options will be included ("AND" relation). Supported BeiDou system (BDS):

Jump to section

Generel Characteristics
Architecture
Buses
Clock Frequencies
Cache Memories
Technology and Packaging
Graphical Subsystem
Cellular Communication
Satellite Navigation


You are here: Processor Specs \ Search
Jump to top | Database Licensing | Contact | Banner & Text Link Advertising | Help | Sitemap | Privacy Policy

(c) 2006 -2024 PhoneDB. All rights reserved.