Generel Characteristics:
|
Designer |
Apple |
| Type: |
A18 APL1V08 T8142 |
| Codename: |
Tupai |
| Year Released: |
2024 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word |
64 bit |
| Supported Instruction Set(s): |
ARMv9.2-A |
Type of processor core(s) |
2x Apple Tupai P + 4x Apple Tupai E cores |
| Number of processor core(s): |
hexa-core |
Buses:
|
| Memory Interface(s): |
LPDDR5 SDRAM
, LPDDR5X SDRAM |
Max. Clock Frequency of Memory IF |
3750 MHz |
Data Bus Width |
16 bit |
| Number of data bus channels: |
4 ch |
Max. Data Rate |
60 Gbyte/s |
Non-volatile Memory Interface |
moviNAND
, NAND Flash Interface
, SATA
, SATA II
, UFS 3.1
, UFS 3.1 2-lane
, UFS 4.0 |
Clock Frequencies:
|
| Recommended Maximum Clock Frequency: |
4044 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core |
192 Kbyte I-Cache |
L1 Data Cache per Core |
128 Kbyte D-Cache |
Total L2 Cache |
12288 Kbyte L2 |
| Total L3 Cache: |
12288 Kbyte L3 |
Technology and Packaging:
|
Feature Size |
3 nm |
| Semiconductor Technology: |
FinFET |
| Number of Transistors Integrated: |
15200000000 |
Fab |
TSMC |
Graphical Subsystem:
|
Embedded GPU |
Apple G17P GPU |
| Number of GPU cores: |
5-core GPU |
| GPU Clock: |
1470 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: APL1008, 2x Harvard Superscalar Apple Tupai Performance processor cores (up to 4.04 GHz, 192 KB L1 data cache per core, 128 KB L1 instruction cache per core, 4 MiB L2 cache per core) + 4x Harvard Superscalar Apple Tupai Efficiency.. ›› |
Datasheet Attributes:
|
Data Integrity |
Preliminary |
Added |
2024-10-11 19:15 |