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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component HiSilicon
Type KIRIN9000WM Hi36A0
Year Released 2024
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit
Supported Instruction Set(s) ARMv8-A (A32, A64)
Type of processor core(s)Type and allocation of processor core(s) 3x HiSilicon TaiShan V120 + 3x ARM Cortex-A510 MPcore
Number of processor core(s) hexa-core

BusesBuses: 
Memory Interface(s):   LPDDR5 SDRAM , LPDDR5X SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 4266 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 16 bit
Number of data bus channels 4 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 68.26 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  UFS 3.1UFS 3.1 (released as JESD220E in 2020) defines single-lane 1.45 GB/s or dual-lane 2.9 GB/s NAND flash EEPROM interface , UFS 4.0UFS 4.0 (released in May, 2022) defines 4.2 GB/s V-NAND interface


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 2350 MHz max.

Cache MemoriesCache Memories: 

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 7 nm
Semiconductor Technology:   FinFETMultigate (usually double-gate) MOSFET transistor technology
FabPlant which fabricates the semiconductor component SMIC

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). HiSilicon Maleoon 910 GPU
Number of GPU cores 4-core GPU
GPU Clock 750 MHz GPU

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Additional InformationAdditional Information: 
Special Features
single TaiShan V120 (up to 2.35 GHz, 2 threads) + triple TaiShan V120 (up to 2.15 GHz, 4 threads) + triple ARM Cortex-A510 (up to 1.53 GHz, 3 threads) Harvard Superscalar processor cores, ARM big.LITTLE, HMP, Da Vinci NPU, 4K.. ››

Datasheet AttributesDatasheet Attributes: 

Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2024-09-30 12:42
 
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