 Generel Characteristics:
|
Designer |
HiSilicon |
| Type: |
KIRIN9000WM 4G Hi36A0 |
| Year Released: |
2024 |
| Function |
Multi-core Application Processor with Modem |
 Architecture:
|
| Width of Machine Word |
64 bit |
| Supported Instruction Set(s): |
ARMv8-A (A32, A64) |
| Type of processor core(s) |
3x HiSilicon TaiShan V120 + 3x ARM Cortex-A510 MPcore |
| Number of processor core(s): |
hexa-core |
 Buses:
|
| Memory Interface(s): |
LPDDR5 SDRAM
, LPDDR5X SDRAM |
| Max. Clock Frequency of Memory IF |
4266 MHz |
| Data Bus Width |
16 bit |
| Number of data bus channels: |
4 ch |
| Max. Data Rate |
68.26 Gbyte/s |
| Non-volatile Memory Interface |
UFS 3.1
, UFS 4.0 |
 Clock Frequencies:
|
| Recommended Maximum Clock Frequency: |
2350 MHz max. |
 Cache Memories:
|
 Technology and Packaging:
|
| Feature Size |
7 nm |
| Semiconductor Technology: |
FinFET |
| Fab |
SMIC |
 Graphical Subsystem:
|
| Embedded GPU |
HiSilicon Maleoon 910 GPU |
| Number of GPU cores: |
4-core GPU |
| GPU Clock: |
750 MHz GPU |
 Cellular Communication:
|
| Supported Cellular Data Links |
No |
 Additional Information:
|
Special Features:
single TaiShan V120 (up to 2.35 GHz, 2 threads) + triple TaiShan V120 (up to 2.15 GHz, 4 threads) + triple ARM Cortex-A510 (up to 1.53 GHz, 3 threads) Harvard Superscalar processor cores, ARM big.LITTLE, HMP, Da Vinci NPU, 4K.. ›› |
 Datasheet Attributes:
|
| Data Integrity |
Preliminary |
| Added |
2024-09-30 12:42 |
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