Generel Characteristics:
|
Designer |
Apple |
Type: |
M4 APL1206 T8132 |
Codename: |
Donan |
Year Released: |
2024 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word |
64 bit |
Supported Instruction Set(s): |
ARMv9.2-A |
Type of processor core(s) |
4x Apple P ARMv9 + 6x Apple E ARMv9 cores |
Number of processor core(s): |
deca-core |
Buses:
|
Memory Interface(s): |
LPDDR5 SDRAM
, LPDDR5X SDRAM |
Max. Clock Frequency of Memory IF |
3750 MHz |
Data Bus Width |
64 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate |
120 Gbyte/s |
Non-volatile Memory Interface |
eMMC 5.1
, moviNAND
, NAND Flash Interface
, SATA
, SATA II
, SATA III
, UFS 3.1
, UFS 3.1 2-lane
, UFS 4.0 |
Clock Frequencies:
|
Recommended Maximum Clock Frequency: |
4400 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core |
192 Kbyte I-Cache |
L1 Data Cache per Core |
128 Kbyte D-Cache |
Total L2 Cache |
20480 Kbyte L2 |
Total L3 Cache: |
8192 Kbyte L3 |
Technology and Packaging:
|
Feature Size |
3 nm |
Semiconductor Technology: |
FinFET |
Number of Transistors Integrated: |
28000000000 |
Fab |
TSMC |
Graphical Subsystem:
|
Embedded GPU |
Apple G16G GPU |
Number of GPU cores: |
10-core GPU |
GPU Clock: |
1578 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: 4x high-performance 64-bit ARMv9-compatible Harvard Superscalar processor cores (up to 4.4 GHz, 192 KiB of L1 instruction cache per core, 128 KiB of L1 data cache per core, 16 MiB shared L2 cache) + 4x high-efficiency 64-bit ARMv9-compatible Harvard Superscalar.. ›› |
Datasheet Attributes:
|
Data Integrity |
Final |
Added |
2024-07-14 20:35 |