Generel Characteristics:
|
Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
Apple |
Type: |
M1 Pro Lite APL1103 / APL1W03 |
Codename: |
T6000 |
Year Released: |
2021 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
64 bit |
Supported Instruction Set(s): |
ARMv8.6-A (A32, A64) |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
6x Apple Firestorm + 2x Apple Icestorm cores |
Number of processor core(s): |
octa-core |
Buses:
|
Memory Interface(s): |
LPDDR5 SDRAM |
Address Bus Width![Maximum selectable bit width of address bus of memory interface Maximum selectable bit width of address bus of memory interface](icons/10x10/info_gray.gif) |
32 bit |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
3200 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
128 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
204.8 Gbyte/s |
Non-volatile Memory Interface |
eMMC 5.1
, moviNAND
, NAND Flash Interface
, SATA
, SATA II
, SATA III
, UFS 3.1
, UFS 3.1 2-lane![Complies with dual-lane Universal Flash Storage 3.1 revision offering 2.9 GB/s NAND flash data rate Complies with dual-lane Universal Flash Storage 3.1 revision offering 2.9 GB/s NAND flash data rate](icons/10x10/info_gray.gif) |
Clock Frequencies:
|
Recommended Minimum Clock Frequency: |
600 MHz min. |
Recommended Maximum Clock Frequency: |
3228 MHz max. |
Cache Memories:
|
L1 Instruction Cache per Core![Capacity of level 1 instruction cache per processor core Capacity of level 1 instruction cache per processor core](icons/10x10/info_gray.gif) |
192 Kbyte I-Cache |
L1 Data Cache per Core![Capacity of level 1 data cache per processor core Capacity of level 1 data cache per processor core](icons/10x10/info_gray.gif) |
128 Kbyte D-Cache |
Total L2 Cache![Capacity of level 2 cache shared between processor core(s) Capacity of level 2 cache shared between processor core(s)](icons/10x10/info_gray.gif) |
22528 Kbyte L2 |
Total L3 Cache: |
24576 Kbyte L3 |
Technology and Packaging:
|
Feature Size![The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology The minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology](icons/10x10/info_gray.gif) |
5 nm |
Semiconductor Technology: |
FinFET![Multigate (usually double-gate) MOSFET transistor technology Multigate (usually double-gate) MOSFET transistor technology](icons/10x10/info_gray.gif) |
Number of Transistors Integrated: |
33700000000 |
Fab![Plant which fabricates the semiconductor component Plant which fabricates the semiconductor component](icons/10x10/info_gray.gif) |
TSMC |
Graphical Subsystem:
|
Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
Apple M1 Pro GPU |
Number of GPU cores: |
14-core GPU |
GPU Clock: |
1296 MHz GPU |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: 6x high-performance Apple Firestorm 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (up to 3228 MHz, 192 KiB of L1 instruction cache per core, 128 KiB of L1 data cache per core, 18 MiB shared L2 cache) + 2x high-efficiency Apple.. ›› |
Datasheet Attributes:
|
Data Integrity |
Final |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2022-07-05 15:06 |