Generel Characteristics: |
Designer |
Apple |
Type: |
M1 Lite APL1102 / APL1W02 |
Codename: |
T8103 |
Year Released: |
2020 |
Function |
Multi-core Application Processor |
Architecture: |
Width of Machine Word |
64 bit |
Supported Instruction Set(s): |
ARMv8.5-A (A32, A64) |
Type of processor core(s) |
4x Apple Firestorm + 4x Apple Icestorm cores |
Number of processor core(s): |
octa-core |
Buses: |
Memory Interface(s): |
LPDDR4x SDRAM |
Address Bus Width |
32 bit |
Max. Clock Frequency of Memory IF |
2133 MHz |
Data Bus Width |
64 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate |
68.26 Gbyte/s |
Non-volatile Memory Interface |
eMMC 5.1
, moviNAND
, NAND Flash Interface
, SATA
, SATA II
, SATA III
, UFS 3.1
, UFS 3.1 2-lane |
Clock Frequencies: |
Recommended Maximum Clock Frequency: |
3228 MHz max. |
Cache Memories: |
L1 Instruction Cache per Core |
192 Kbyte I-Cache |
L1 Data Cache per Core |
128 Kbyte D-Cache |
Total L2 Cache |
16384 Kbyte L2 |
Total L3 Cache: |
8192 Kbyte L3 |
Technology and Packaging: |
Feature Size |
5 nm |
Semiconductor Technology: |
FinFET |
Number of Transistors Integrated: |
16000000000 |
Fab |
TSMC |
Graphical Subsystem: |
Embedded GPU |
Apple M1 GPU |
Number of GPU cores: |
7-core GPU |
GPU Clock: |
1278 MHz GPU |
Cellular Communication: |
Supported Cellular Data Links |
No |
Additional Information: |
Special Features: 4x high-performance Apple Firestorm 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (up to 3228 MHz, 192 KiB of L1 instruction cache per core, 128 KiB of L1 data cache per core, 12 MiB shared L2 cache) + 4x high-efficiency Apple.. ›› |
Datasheet Attributes: |
Data Integrity |
Final |
Added |
2022-07-05 15:00 |