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|
| Designer |
Apple |
| Type: | A12X Bionic APL1083 T8027 |
| Codename: | Aruba |
| Year Released: | 2018 |
| Function |
Multi-core Application Processor |
|
|
| Width of Machine Word |
64 bit |
| Supported Instruction Set(s): | ARMv8.3-A (A32, A64) |
| Type of processor core(s) |
4x Apple Vortex + 4x Apple Tempest cores |
| Number of processor core(s): | octa-core |
|
|
| Memory Interface(s): | LPDDR4x SDRAM |
| Max. Clock Frequency of Memory IF |
2133 MHz |
| Data Bus Width |
64 bit |
| Number of data bus channels: | 2 ch |
| Max. Data Rate |
68.26 Gbyte/s |
| Non-volatile Memory Interface |
eMMC 5.1 |
|
|
| Recommended Maximum Clock Frequency: | 2496 MHz max. |
|
|
| L1 Instruction Cache per Core |
128 Kbyte I-Cache |
| L1 Data Cache per Core |
128 Kbyte D-Cache |
| Total L2 Cache |
10240 Kbyte L2 |
| Total L3 Cache: | 8192 Kbyte L3 |
|
|
| Feature Size |
7 nm |
| Semiconductor Technology: |
FinFET |
| Number of Transistors Integrated: | 10000000000 |
| Fab |
TSMC |
|
|
| Embedded GPU |
Apple G11G GPU |
| Number of GPU cores: | 7-core GPU |
| GPU Clock: | 1098 MHz GPU |
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| Supported Cellular Data Links |
No |
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|
| Special Features: 4x high-performance 3 GHz Apple Vortex 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores (128 Kbyte L1 data cache per core, 128Kbyte L1 instruction cache per core) + 4x high-efficiency 1.6 GHz Apple Tempest 64-bit ARMv8-compatible (AArch32-AArch64) Harvard Superscalar processor cores.. ›› |
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| Data Integrity |
Preliminary |
| Added |
2018-10-30 21:07 |
| Tweet | |