Generel Characteristics:
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Designer![Company which designed the semiconductor component Company which designed the semiconductor component](icons/10x10/info_gray.gif) |
Actions Semiconductor |
Type: |
ATM7039 |
Year Released: |
2013 |
Function |
Application Processor |
Architecture:
|
Width of Machine Word![Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. Maximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors.](icons/10x10/info_gray.gif) |
32 bit |
Supported Instruction Set(s): |
ARMv7-A |
Pipeline Stages![Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. Pipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions.](icons/10x10/info_gray.gif) |
8 pipeline stages |
Type of processor core(s)![Type and allocation of processor core(s) Type and allocation of processor core(s)](icons/10x10/info_gray.gif) |
4x ARM Cortex-A9 MPcore |
Number of processor core(s): |
quad-core |
Buses:
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Memory Interface(s): |
LPDDR2 SDRAM
, DDR3 SDRAM |
Max. Clock Frequency of Memory IF![Clock frequency of fastest supported memory interface Clock frequency of fastest supported memory interface](icons/10x10/info_gray.gif) |
667 MHz |
Data Bus Width![Maximum selectable bit width of primary data bus (RAM) of memory interface Maximum selectable bit width of primary data bus (RAM) of memory interface](icons/10x10/info_gray.gif) |
32 bit |
Number of data bus channels: |
2 ch |
Max. Data Rate![Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. Maximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units.](icons/10x10/info_gray.gif) |
10.67 Gbyte/s |
Non-volatile Memory Interface |
NAND Flash Interface |
Clock Frequencies:
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Recommended Maximum Clock Frequency: |
1500 MHz max. |
Cache Memories:
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Technology and Packaging:
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Semiconductor Technology: |
CMOS![Complementary Metal-oxide - Semiconductor Field Effect Transistor Complementary Metal-oxide - Semiconductor Field Effect Transistor](icons/10x10/info_gray.gif) |
Pins![Number of pins on the package Number of pins on the package](icons/10x10/info_gray.gif) |
544 pins |
Graphical Subsystem:
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Embedded GPU![Manufactuer (or IP designer) and type of embedded graphics coprocessor(s). Manufactuer (or IP designer) and type of embedded graphics coprocessor(s).](icons/10x10/info_gray.gif) |
N/A |
Cellular Communication:
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Supported Cellular Data Links |
No |
Additional Information:
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Special Features: quad ARM Cortex-A9 Harvard Superscalar multiprocessor core, dual-channel 32-bit 533 MHz LP-DDR2 / 667 MHz DDR3 SD RAM interface, USB 3.0 host/slave interface, VFPv4, 1080p 60fps decode, 1080p 60fps encode, OpenGL ES 1.1, OpenGL ES 2.0, OpenVG 1.0.1, HDMI 1.4a.. ›› |
Datasheet Attributes:
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Data Integrity |
Incomplete |
Added![The exact time of the datasheet addition The exact time of the datasheet addition](icons/10x10/info_gray.gif) |
2013-12-28 14:07 |