Generel Characteristics:
|
Designer |
Samsung |
Type: |
MX5S |
Year Released: |
2012 |
Function |
Multi-core Application Processor |
Architecture:
|
Width of Machine Word |
32 bit |
Supported Instruction Set(s): |
ARMv7 |
Pipeline Stages |
8 pipeline stages |
Type of processor core(s) |
4x ARM Cortex-A9 MPcore |
Number of processor core(s): |
quad-core |
Buses:
|
Memory Interface(s): |
SDRAM
, LPDDR SDRAM
, DDR2 SDRAM
, LPDDR2 SDRAM
, DDR3 SDRAM |
Max. Clock Frequency of Memory IF |
533 MHz |
Data Bus Width |
32 bit |
Number of data bus channels: |
1 ch |
Max. Data Rate |
4.26 Gbyte/s |
Non-volatile Memory Interface |
eMMC 4.5
, moviNAND
, NAND Flash Interface
, SATA |
Clock Frequencies:
|
Recommended Minimum Clock Frequency: |
200 MHz min. |
Recommended Maximum Clock Frequency: |
1600 MHz max. |
Cache Memories:
|
Technology and Packaging:
|
Feature Size |
32 nm |
Semiconductor Technology: |
CMOS |
Fab |
Samsung |
Graphical Subsystem:
|
Embedded GPU |
ARM Mali-400 GPU |
Number of GPU cores: |
1-core GPU |
Dedicated Graphics Memory |
0.25 MiB |
Cellular Communication:
|
Supported Cellular Data Links |
No |
Additional Information:
|
Special Features: quad ARM Cortex-A9 Harvard Superscalar processor core, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, HDMI 1.4, triple display controller, stereoscopic video encode, 1080p video encode, 1080p video decode, audio subsystem |
Datasheet Attributes:
|
Data Integrity |
Incomplete |
Added |
2012-12-02 11:55 |