PhoneDB - infinitely detailed




FacebookGoogle PlusRSS FeedTwitter

Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Samsung
Type Exynos 4 Dual 4210 S5PC210
Codename Orion
Year Released 2011
FunctionMain function of the component  Multi-core Application Processor

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7
Pipeline StagesPipeline is kind of instruction level parallelism where stages (FETCH, DEC, OP, EXEC, RES, etc.) of instruction execution are separeted and parallelized between neighboring instructions. 9 pipeline stages
Number of processor core(s) 2
Type of processor core(s)Type and allocation of processor core(s) 2x ARM Cortex-A9 MPcore

BusesBuses: 
Memory Interface(s):   DDR2 SDRAM , mobile (LP) DDR2 SDRAM , DDR3 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 400 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 6.4 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  eMMC 4.5Complies with embedded MMC 4.5 specification released in 2011 , moviNANDmoviNAND is a multimedia card (MMC) controller and onboard firmware developed by Samsung in 2006 , NAND Flash Interface , SATASATA revision 1.0 (2003) offering 1.5 Gbit/s data rate


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 1400 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 1024 Kbyte L2

Technology and PackagingTechnology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 45 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
FabPlant which fabricates the semiconductor component Samsung
PinsNumber of pins on the package 756 pins

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). ARM Mali-400 GPU
Number of GPU cores 1-core GPU
GPU Clock 266 MHz GPU
Dedicated Graphics MemoryDedicated operative memory (video RAM, VRAM) 0.25 MiB

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   USB 2.0Released in April 2000, USB 2.0 specification introduced USB Hi-Speed enabling devices to communicate at 480 Mbit/s data rate.
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  IEEE 802.11aShort range standard, 5 GHz, max. 54 Mbit/s , IEEE 802.11b2.4 GHz (ISM band), max. 11 Mbit/s , IEEE 802.11g2.4 GHz (ISM band), max. 54 Mbit/s , IEEE 802.11n2.4 GHz (ISM band) or optional 5 GHz support, max. 600 Mbit/s thanks to MIMO antennas
Supported Audio/Video Interface:   No

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   GPS (NMEA 0183)NMEA 0183

Additional InformationAdditional Information: 
Special Features
dual ARM Cortex-A9 Harvard Superscalar processor core, 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, 1080p HDMI 1.3a, triple display controller, 1080p 30fps video encode, 1080p 60fps video decode, audio subsystem

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2010-09-14 22:52
 
You are here: Processor Specs \ Samsung Exynos 4 Dual 4210 S5PC210 (Orion) datasheet