Samsung S5PC100

Generel Characteristics:
Designer	Samsung
Type:	S5PC100
Year Released:	2009
Function	Application Processor
Expand datasheet \| Add to compare Architecture:
Width of Machine Word	32 bit
Supported Instruction Set(s):	ARMv7
Pipeline Stages	13 pipeline stages
Type of processor core(s)	ARM Cortex-A8
Number of processor core(s):	single-core
Buses:
Memory Interface(s):	SDRAM , LPDDR SDRAM , DDR2 SDRAM
Max. Clock Frequency of Memory IF	200 MHz
Data Bus Width	16 bit
Number of data bus channels:	1 ch
Max. Data Rate	0.8 Gbyte/s
Non-volatile Memory Interface	moviNAND , NAND Flash Interface , NOR Flash Interface , OneNAND
Clock Frequencies:
Recommended Minimum Clock Frequency:	600 MHz min.
Recommended Maximum Clock Frequency:	833 MHz max.
Cache Memories:
L1 Instruction Cache per Core	32 Kbyte I-Cache
L1 Data Cache per Core	32 Kbyte D-Cache
Total L2 Cache	256 Kbyte L2
Technology and Packaging:
Feature Size	65 nm
Semiconductor Technology:	CMOS
Fab	Samsung
Graphical Subsystem:
Embedded GPU	N/A
GPU Clock:	100 MHz GPU
Expand datasheet Cellular Communication:
Supported Cellular Data Links	No
Additional Information:
Special Features: 64/32-bit Multi-layer AHB/AXI bus, ARM TrustZone, NEON SIMD engine, 3D graphics coprocessor (100MHz), vector floating point coprocessor (VPU), OpenGL ES 2.0
Datasheet Attributes:
Data Integrity	Final
Added	2009-06-21 11:42