|
|
Designer |
Toshiba |
| Type: | TMPR3912U |
| Year Released: | 1997 |
| Function |
Application Processor |
|
|
| Width of Machine Word |
32 bit |
| Supported Instruction Set(s): | MIPS I, MIPS II |
| Number of processor core(s): | 1 |
| Type of processor core(s) |
MIPS R3000A (Toshiba TX) |
|
|
| Memory Interface(s): | Yes |
| Data Bus Width |
32 bit |
| Number of data bus channels: | 1 ch |
| Non-volatile Memory Interface |
No |
|
|
| Internal Systembus Clock: | 33 MHz |
| Recommended Maximum Clock Frequency: | N/A |
|
|
| L1 Instruction Cache per Core |
4 Kbyte I-Cache |
| L1 Data Cache per Core |
1 Kbyte D-Cache |
|
|
| Semiconductor Technology: |
CMOS |
|
|
| Embedded GPU |
N/A |
|
|
| Supported Cellular Data Links |
No |
|
|
| Supported USB Specification: | No |
| Bluetooth support |
No |
| Wireless LAN support |
No |
| Supported Audio/Video Interface: | No |
|
|
| Supported GPS protocol(s): | No |
|
|
| Special Features: 32MB DRAM / 64MB ROM addressing |
|
|
|
| Data Integrity |
Final |
| Added |
2006-01-01 06:00 |
| Tweet | |
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