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Processor Specs: Referred (not editable) comparison sheet [2]

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Intel Core 7th Gen i5-7200U (Kaby Lake)
Intel Core 7th Gen i3-7100U (Kaby Lake)
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Intel Core 7th Gen i5-7200U  (Kaby Lake)
Intel Core 7th Gen i3-7100U  (Kaby Lake)
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Generel CharacteristicsGenerel Characteristics
Year Released 2016 2016
FunctionMain function of the component Multi-core Application Processor Multi-core Application Processor

ArchitectureArchitecture
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 64 bit 64 bit
Supported Instruction Set(s) IA-64 (x86-64), MMX, SSE, SSE2, SSE3, SSE4, SSE 4.1, SSE 4.2, AV IA-64 (x86-64), MMX, SSE, SSE2, SSE3, SSE4, SSE 4.1, SSE 4.2, AV
Type of processor core(s)Type and allocation of processor core(s) 2x Intel Kaby Lake-U 2x Intel Kaby Lake-U
Number of processor core(s) dual-core dual-core

BusesBuses
Memory Interface(s) DDR3L SDRAM, LPDDR3 SDRAM, DDR4 SDRAM DDR3L SDRAM, LPDDR3 SDRAM, DDR4 SDRAM
Max. Clock Frequency of Memory IFClock frequency of fastest supported memory interface 1066 MHz 1066 MHz
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 64 bit 64 bit
Number of data bus channels 2 ch 2 ch
Max. Data RateMaximal throughput of the fastest supported memory interface in 1000 megabyte per seconds units. 34.11 Gbyte/s 34.11 Gbyte/s
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory SATA, SATA II, SATA III SATA, SATA II, SATA III

Clock FrequenciesClock Frequencies
Internal Systembus Clock 400 MHz
Recommended Minimum Clock Frequency 2500 MHz min.
Recommended Maximum Clock Frequency 3100 MHz max. 2400 MHz max.

Cache MemoriesCache Memories
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 512 Kbyte L2 512 Kbyte L2
Total L3 Cache 3072 Kbyte L3 3072 Kbyte L3



Technology and PackagingTechnology and Packaging
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 14 nm 14 nm
Semiconductor Technology CMOS CMOS
FabPlant which fabricates the semiconductor component Intel Intel
PinsNumber of pins on the package 1356 pins 1356 pins

Graphical SubsystemGraphical Subsystem
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). Intel HD Graphics 620 GPU Intel HD Graphics 620 GPU
GPU Clock 300 MHz GPU 300 MHz GPU

Cellular CommunicationCellular Communication

Additional InformationAdditional Information
Special Features Dual Intel Kaby Lake-U processor cores, 32 Kbyte instruction cache per core, 32 Kbyte data cache per core, 256 Kbyte L2 cache per core, 3 Mbyte L3 cache (Intel Smart Cache, 16-way set associative), dual-channel 64-bit DDR4-2133, LPDDR3-1866, DDR3L-1600 SD.. Dual Intel Kaby Lake-U processor cores, 32 Kbyte instruction cache per core, 32 Kbyte data cache per core, 256 Kbyte L2 cache per core, 3 Mbyte L3 cache (Intel Smart Cache,16-way set associative), dual-channel 64-bit DDR4-2133, LPDDR3-1866, DDR3L-1600 SD RAM..

Datasheet AttributesDatasheet Attributes
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b Preliminary Preliminary
AddedThe exact time of the datasheet addition 2016-12-06 22:52 2016-12-06 23:01

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