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Spreadtrum SC7731G

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Generel Characteristics: 
DesignerCompany which designed the semiconductor component Spreadtrum
Type SC7731G
Year Released 2014
FunctionMain function of the component  Multi-core Application Processor with Modem

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) ARMv7-A
Type of processor core(s)Type and allocation of processor core(s) 4x ARM Cortex-A7 MPcore
Number of processor core(s) quad-core

BusesBuses: 
Memory Interface(s):   LPDDR SDRAM, LPDDR2 SDRAM, LPDDR3 SDRAM
Data Bus WidthMaximum selectable bit width of primary data bus (RAM) of memory interface 32 bit
Number of data bus channels 1 ch

Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency 1300 MHz max.

Cache MemoriesCache Memories: 
L1 Instruction Cache per CoreCapacity of level 1 instruction cache per processor core 32 Kbyte I-Cache
L1 Data Cache per CoreCapacity of level 1 data cache per processor core 32 Kbyte D-Cache
Total L2 CacheCapacity of level 2 cache shared between processor core(s) 512 Kbyte L2

Technology and Packaging: 
Feature SizeThe minimum physical dimension in the integrated circuit which can be fabricated with the given semiconductor technology 28 nm
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor
PinsNumber of pins on the package 454 pins

Additional Features: 
Supported Cellular Data LinksList of supported cellular data links  GPRSGeneral Packet Radio Service, EDGEEnhanced Data Rates for GSM Evolution also known as Enhanced GPRS (EGPRS), EDGE MSC12, UMTSUniversal Mobile Telecommunications System. UMTS Release '99 data link layer, W-CDMA grants up to 384 kbit/s pocket-switched download speed., HSUPAHigh-Speed Uplink Packet Access is a 3.5G UMTS uplink protocol., HSUPA 5.8, HSDPAHigh-Speed Downlink Packet Access is a 3.5G UMTS downlink protocol., HSPA+ 21.1
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). ARM Mali-400 GPU
Number of GPU cores 2-core GPU
Special Features quad ARM Cortex-A7 Harvard processor core, 16/32-bit LP-DDR..


Datasheet Attributes: 
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Preliminary
AddedThe exact time of the datasheet addition 2015-03-16 21:07
 
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