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Generel CharacteristicsGenerel Characteristics: 
DesignerCompany which designed the semiconductor component Motorola
Type DragonBall Super VZ MC68SZ328
Year Released 2000
FunctionMain function of the component  System-On-a-Chip

ArchitectureArchitecture: 
Width of Machine WordMaximum bitwidth of ALU operands. Width of machine word can also be defined in different ways (register width, instruction width, etc.) in case of recent microprocessors. 32 bit
Supported Instruction Set(s) 68k
Number of processor core(s) 1
Type of processor core(s)Type and allocation of processor core(s) Motorola 68000

BusesBuses: 
Memory Interface(s):   Yes
Number of data bus channels 1 ch
Non-volatile Memory InterfaceInterface which determines physical layer towards the NV memory  No
DMA ChannelsDMA (Direct Memory Access) allows direct data transfer between operative memory (RAM) and peripherals (hard disk, non-volatile storage, etc.) bypassing processor core. Multiple DMA channels allows parallel DMA operations. 1 ch


Clock FrequenciesClock Frequencies: 
Recommended Maximum Clock Frequency N/A

Cache MemoriesCache Memories: 

Technology and PackagingTechnology and Packaging: 
Semiconductor Technology:   CMOSComplementary Metal-oxide - Semiconductor Field Effect Transistor

Graphical SubsystemGraphical Subsystem: 
Embedded GPUManufactuer (or IP designer) and type of embedded graphics coprocessor(s). N/A

Cellular CommunicationCellular Communication: 
Supported Cellular Data LinksList of supported cellular data links  No

Communication InterfacesCommunication Interfaces: 
Supported USB Specification:   No
Bluetooth supportThis field specifies the supported BT version  No
Wireless LAN supportThis field enumerates the supported Wi-Fi protocols  No
Supported Audio/Video Interface:   No

Satellite NavigationSatellite Navigation: 
Supported GPS protocol(s):   No

Additional InformationAdditional Information: 
Instruction Execution Performance 10.8 million instruction per
Instruction Execution Performance Clock Rate:  66 MHz
Special Features
A/D converter (with touch panel control), an MMC/SD host controller, a DMA controller, embedded SRAM, a USB device controller, I2C interface

Datasheet AttributesDatasheet Attributes: 

Related Page URL
Data IntegrityData integrity level determines the integrity of the published information. Final datasheets are not intended to be modified in the future, preliminary ones can be based on unofficial information or speculations, incomplete ones are also preliminary b  Final
AddedThe exact time of the datasheet addition 2008-02-25 15:28
 
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